This invention relates to a semiconductor memory device, and more particularly a semiconductor memory device capable of saving read only memory devices (ROMs) containing defective cells.
With increase of memory capacity of the memory devices, a production yield of the memory devices is reduced due to disconnection of row and column lines, and crystal defects, and the like. One of the measures thus far taken for this problem is to incorporate a redundancy circuit into the memory chip. In this measure, normal memory cells of the redundancy circuit are used for defective cells of the memory device if the defective cells are found. The measure, however, has a disadvantage in that replacing of the defective cell by the normal cell needs time and trouble. Another measure as has been proposed is based on the error code correct (ECC) system which has been employed in large computers for check and correction of error code. This approach has practically been employed in some manufacturers. In the measure, the memory cells for storing parity bits are additionally used. The contents of the parity bits are referenced to for defective bits detection if data bits (for example, 8 bits) contain a defective bit or bits. In a mask ROM of a large capacity, for example, 1 M bits or more, approximately 20% of the total data bits is needed for parity memory cells. This fact implies increase of memory chip size. Further, in a read out mode, an operation circuit operates for error check and correction, so that the access time is long.